By Bart Vermeulen,Kees Goossens
This ebook describes an strategy and helping infrastructure to facilitate debugging the silicon implementation of a System-on-Chip (SOC), permitting its linked product to be brought into the marketplace extra quickly. Readers study step by step the major specifications for debugging a latest, silicon SOC implementation, 9 elements that complicate this debugging job, and a brand new debug process that addresses those specifications and complicating factors. The authors’ novel communication-centric, scan-based, abstraction-based, run/stop-based (CSAR) debug strategy is mentioned intimately, exhibiting the way it is helping to fulfill debug specifications and handle the 9, formerly pointed out elements that complicate debugging silicon implementations of SOCs. The authors additionally derive the debug infrastructure necessities to aid debugging of a silicon implementation of an SOC with their CSAR debug strategy. This debug infrastructure includes a conventional on-chip debug structure, a configurable automatic design-for-debug move for use through the layout of an SOC, and customizable off-chip debugger software program. assurance contains an review of the potency and effectiveness of the CSAR method and its helping infrastructure, utilizing six commercial SOCs and an illustrative, instance SOC model. The authors additionally quantify the expense and layout attempt to help their approach.
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Extra info for Debugging Systems-on-Chip: Communication-centric and Abstraction-based Techniques (Embedded Systems)
Debugging Systems-on-Chip: Communication-centric and Abstraction-based Techniques (Embedded Systems) by Bart Vermeulen,Kees Goossens